A recent increase in the amount of data manipulated requires a semiconductor device having high storage capacity.
To manufacture a semiconductor device having high storage capacity, the manufacturing cost per unit storage capacity needs to be reduced. The manufacturing cost can be effectively reduced when the area of a memory cell is reduced by miniaturization or when two or more bit data, i.e., multilevel data is retained in a memory cell so that the area per bit is reduced.
In view of the above, Patent Document 1 discloses a semiconductor device in which multilevel data is retained by utilizing a change in the threshold voltage of a transistor in a memory cell, which depends on the amount of charge accumulated in a floating node of the transistor.